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Im using an ARM926EJ-S and am trying to figure out whether the ARM can give (e.g. a readable register) the CPU's cycle-counter. I guess a # that will represent the number of cycles since the CPU has been powered.

In my system i have only Low-Res external RTC/Timers. I would like to be able to achieve a Hi-Res timer.

Many thanks in advance!

x29a
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Eyal
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  • Regarding "# that will represent the number of cycles since the CPU has been powered", if such a register were 32 bits and the processor speed 200MHz, your counter would last little more than 21 seconds after power-on before wrapping around. Time since power-on if that is what you really want is not usefully measured in instruction cycles. – Clifford Jun 11 '11 at 07:13
  • The ARM926 probably only has timers that can run at the speed of the bus. – ninjalj Jun 11 '11 at 09:15

2 Answers2

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The arm-9 is not equipped with an PMU (Performance Monitoring Unit) as included in the Cortex-family. The PMU is described here. The linux kernel comes equipped with support for using the PMU for benchmarking performance. See here for documentation of the perf tool-set.

Bit unsure about the arm-9, need to dig a bit more...

Fredrik Pihl
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  • Thanks for the quick answer!... BUT... Are you sure that the PMU exist for ARM926EJ-S?... I know it exists for Cortex/ARM11?... – Eyal Jun 09 '11 at 21:17
  • @Eyal the 926 do NOT have an PMU, as I said I need to dig a bit more :-) – Fredrik Pihl Jun 09 '11 at 21:29
  • Oh... didnt notice the last like there... SORRY!... So my question is still open, i guess... – Eyal Jun 09 '11 at 21:40
  • @Eyal: Not I would say it is closed. If the answer is "no", waiting longer will not make it "yes". – Clifford Jun 11 '11 at 06:56
  • Fredrik offered to "dig a bit more" in order to check whether there is a way to achieve timer information despite the lack of a PMU... Do you think i got my answer?... – Eyal Jun 11 '11 at 07:21
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You probably have only two choices:

  • Use an instruction-cycle accurate simulator; the problem here is that effectively simulating peripherals and external stimulus can be complex or impossible.

  • Use a peripheral hardware timer. In most cases you will not be able to run such a timer at the typical core clock rate of an ARM9, and there will be an over head in servicing the timer either side of the period being timed, but it can be used to give execution time over larger or longer running sections of code, which may be of more practical use than cycle count.

While cycle count may be somewhat scalable to different clock rates, it remains constrained by memory and I/O wait states, so is perhaps not as useful as it may seem as a performance metric, except at the micro-level of analysis, and larger performance gains are typically to be had by taking a wider view.

Clifford
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  • Thank you very much!... I guess i dont have an "immediate" solution... BUT... I'll consider your proposals!!! – Eyal Jun 11 '11 at 10:11