What are the limitations of the gm/id based analog design methodology employed for sub-micron process nodes? I was reading a research paper that mentioned the design methodology is restricted only to class A devices.
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gm/id methodology can be used for any design where transistors are in the saturation region
Alex
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The Paper describes device operation in other regions as well. – Yashas Lr Jun 15 '20 at 22:14
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AFAIK gm defined only in a saturation region. How would you define gm in linear? – Alex Jun 17 '20 at 10:47
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There are designs that operate in the subthreshold region as well. – Yashas Lr Jul 20 '20 at 19:41
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Subthreshold not very different from saturation. Actually for modern processes, because of low supply voltages, almost all transistors will work in subthreshold – Alex Aug 05 '20 at 07:14