is it possible to call out Verilog function in a VHDL code by using Quartus

Question

I'm currently reviewing 2 types of code (VHDL and Verilog). I trying to combine some function from Verilog into VHDL code by using Quartus. Is it possible to do it directly in Quartus? Or any recommend free Verilog2VHDL converter?

Answer 1

There's no way to call a Verilog function from VHDL directly.

What you'll have to do is wrap the function in an module so that the function gets called whenever the inputs change, and make an assignment to the output.

module wrap_function(input arg1,arg2, output arg3);

function Vfunction(input arg1, arg2);
   begin
   // whatever 
   Vfunction = ...;
   end
endfunction

assign arg3 = Vfunction(arg1,arg2);
endmodule

Then you can instantiate this module in a similar VHDL entity wrapper that has a procedure the modifies the input and captures the outputs.