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I have a Makefile of the following form:

upload_image_local: build_image_local ; echo "This gets printed" ; upload_image

with

build_image_local: echo "This is build_image_local"
    ./my_shell_script_1.sh $(SOME_ENV_VAR_1)

upload_image: echo "This is upload_image"
    ./my_shell_script_2.sh $(SOME_ENV_VAR_2)

As you can tell, when I run make upload_image_local, I want build_image_local and upload_image to be run. Instead I get:

/bin/sh: upload_image: command not found

I know for file dependencies we put spaces between them, but here I'm not sure how to separate the two statements properly. I also tried putting them in the next line with semicolons and a tab character (I know it matters):

upload_image_local:
    build_image_local ; echo "This gets printed" ; upload_image

In which case I get:

/bin/sh: build_image_local: command not found
make: *** [upload_image_local] Error 127

What is the correct way to run this target? Also, why do the echo commands get printed fine? If it matters I'm running this Makefile on a Mac and with the sh shell (as it says).

BlameMe
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  • Please read the docs mentioned below. As they will show, you cannot "mix and match" prerequisites like `build_image_local` and script commands like `echo ...`. The syntax of a rule is `*target* : *prerequisites* ; *recipe*` (where you can use a newline/TAB instead of a semicolon between the prerequisites and recipe if you prefer). – MadScientist May 18 '20 at 12:22

1 Answers1

1

I would really advise you to take a tutorial on Make.

To achieve the desired effect, I think the following should work:

all: upload_image

build_image_local:
    echo "This is build_image_local"
    ./my_shell_script_1.sh  $$SOME_ENV_VAR_1

upload_image_local: build_image_local
    echo "This gets printed"

upload_image: upload_image_local
    echo "This is upload_image"
    ./my_shell_script_2.sh $$SOME_ENV_VAR_2

Also, I am assuming SOME_ENV_VAR_1 and SOME_ENV_VAR_2 are shell variables which is why I wrote them as $$SOME_ENV_VAR_1 and $$SOME_ENV_VAR_2. If they are variables of your Makefile then turn them back to way they were.

Also remember that the recipe in Makefile would spawn a subshell and you need to make sure that your env vars are available to those subshells.

Mihir Luthra
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