How does risc-v c emulator works?

Question

I'm running a Linux virtual machine based on x86. and I'm doing cross-compilation(target : RISC-V) with RISC-V compiler and emulator. I want to know how RISC-V emulator(C file) emulates RISC-V instructions without a real RISC-V cpu.

Answer 1

A CPU simulator is a program that takes as input a binary executable file and performs the same steps to execute it that a native CPU does. In the RISC-V case, it fetches the memory pointed at by the Program Counter (PC), and decodes the 32-bit word according to the RISC-V instruction set specification. Next, depending on which instruction it is (load, store, register operation) it performs that operation in software, then increments the PC (or sets it, if the instruction is a jump or return), and fetches the next instruction to execute. The registers and memory in the simulated CPU are just arrays of 32-bit (or 64-bit for RISC-V 64) integers in the simulator.

If you're curious about how a CPU works, writing a basic simulator for one is a fun (and instructive!) exercise. You can write a CPU simulator in any programming language.