Makefile - How to call other makefiles with dependencies

Question

Hey, I have a simple "master" Makefile who simply calls other makefiles. I'm trying to do the following in order to build components in the right order:

LIB_A = folder_a
LIB_B = folder_b
LIB_C = folder_c

MY_TARGETS = $(LIB_A) $(LIB_B) $(LIB_C)

.PHONY: $(LIB_A)
$(LIB_A):
    @$(MAKE) -C $@;

.PHONY: $(LIB_B)
$(LIB_B):
    @$(MAKE) -C $@;

.PHONY: $(LIB_C)
$(LIB_C): $(LIB_A) $(LIB_B)
    @$(MAKE) -C $@;

.PHONY: all 
all: $(MY_TARGETS)

However, when I make, only LIB_A gets built.

(I don't even get a folder_b up-to-date message or whatever).

Any hint ?

score 8 · Accepted Answer · edited Jun 14 '14 at 12:01

8

You need to make all the default. You can do this in either of these ways:

move it to be the first target in the file
Add .DEFAULT_GOAL := all

Alternatively, you could run make all instead of just make.

edited Jun 14 '14 at 12:01

nickf

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answered May 25 '11 at 21:59

Butterworth: Indeed. That totally fixed it. I didn't know the order of the targets had an impact.. – vdsf May 25 '11 at 22:02
1

@turbo In general the order doesn't matter, except that the default is the first. You can also specify the default using some syntax I've forgotten :-) – May 25 '11 at 22:05
And you could of course have said `make all` and your original makefile should have worked. – May 25 '11 at 22:15
2

In case someone reads this in the future, the syntax you are looking for is `.DEFAULT_GOAL := all` (or whatever your goal is). – keefer Mar 10 '14 at 20:18

score 8 · Answer 2 · answered May 25 '11 at 22:09

8

Neil Butterworth solved the problem, but you can also make this makefile a little more concise:

LIB_A = folder_a
LIB_B = folder_b
LIB_C = folder_c

MY_TARGETS = $(LIB_A) $(LIB_B) $(LIB_C)

.PHONY: all $(MY_TARGETS)
all: $(MY_TARGETS)

$(MY_TARGETS):
    @$(MAKE) -C $@;

$(LIB_C): $(LIB_A) $(LIB_B)

answered May 25 '11 at 22:09

Beta

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How would you define clean to clean all modules in this example? – nilo Jan 08 '16 at 20:24
@nilo: I'd change the command to `@$(MAKE) -C $@ $(TARG)`, then add the `clean` rule: `clean: TARG=cleanclean: all` – Beta Jan 09 '16 at 00:08

Makefile - How to call other makefiles with dependencies

2 Answers2