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As per the Intel® 64 and IA-32 Architectures Software Developer’s Manual In 64-bit mode, segmentation is generally (but not completely) disabled, creating a flat 64-bit linear-address space. Does that mean GDTR is not needed/present in a x86_64 CPU?

Michael Petch
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Franc
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    A GDT is still needed for a code segment. Also, x86-64 CPUs still boot in real mode, and support legacy mode (i.e support OSes that only use 32-bit or 16-bit protected mode.) https://en.wikipedia.org/wiki/X86-64#Operating_modes – Peter Cordes Mar 22 '20 at 16:14
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    Beyond what Peter said, A GDT is the only place to create TSS descriptor. At least one TSS descriptor will be needed (many OSes create one per CPU) to make a useful OS with interrupts that has kernel space and user space. A TSS is needed to change between rings. Ring 0 (kernel) and Ring 3 (user) still apply to 64-bit long mode. – Michael Petch Mar 22 '20 at 16:29
  • @Michael Petch , Thanks for the answer. But is TSS used in modern OSs like Linux? My understanding is that it is is used in ```Hardware Multitasking```. – Franc Jun 27 '20 at 16:25
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    @FrancM The TSS has a number of purposes. It was originally found on the 80286. The TSS does store information to carry out hardware task switches but it is also used to control which stack is to be used when transitioning between different rings. It is also used to control which IO ports are available directly to no-privileged rings. The 80386 and 80286 used the TSS for that purpose. On an x86-64 processor hardware task switching In long mode no longer exists, however the stack locations for ring changes are stored in the TSS and long mode still uses TSS for IO port access rights. – Michael Petch Jun 27 '20 at 16:45
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    @FrancM : In long mode (which includes 64-bit mode, 16-bit compatibility mode and 32-bit compatibility mode) the area of the TSS that was used for hardware task switching is now used to store the [Interrupt Stack Table (IST)](https://xem.github.io/minix86/manual/intel-x86-and-64-manual-vol3/o_fe12b1e2a880e0ce-205.html). – Michael Petch Jun 27 '20 at 16:51
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    So yes, the TSS still exists and is required by modern OSes to switch between rings and handle interrupts and control which ports unprivileged rings have access to, but long mode (ia32e mode) doesn't support hardware task switching. – Michael Petch Jun 27 '20 at 16:53
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    I should point out that an x86-64 processor has a couple of operating modes. **Long Mode** (ia32e mode) which includes 64-bit mode and 16 and 32-bit compatibility mode. It also has **legacy mode** which includes real mode, 16 and 32-bit protected mode, v8086 mode, and real mode. – Michael Petch Jun 27 '20 at 17:04

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