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why we have to put the mov cr0 and jmp instructions into a page that is identity mapped?

I have been using Google to search this question but I am not able to understand the results.

0xff
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    Otherwise enabling paging would effectively do a jump (CS:IP suddenly mean something else). If you have different code that does something useful at the corresponding CS:IP, that could be ok, too. – Peter Cordes Mar 05 '20 at 18:13
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    The issue really is that once you flip the PG (Page Bit in CR0) to 1, the processor must fetch the next instruction in virtual memory. If the virtual memory address of the next instruction after enabling the PG bit is not identity mapped the processor can't retrieve it and it would fault. – Michael Petch Mar 05 '20 at 18:22
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    Don't edit [solved] into your title. SO already shows answered or not status based on there being an accepted answer. – Peter Cordes Mar 06 '20 at 05:32

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When enabling protected mode (and not enabling paging); you don't need to make sure the page is identity mapped.

When enabling paging (possibly while also enabling protected mode) the CPU will try to fetch the next instruction after the mov cr0 from the (virtual) address after the mov cr0. The easiest way to deal with this is to identity map the page, so that the instruction after the mov cr0 in physical memory will also be the instruction after the mov cr0 in virtual memory. However; this is not strictly required. For example, if you arrange for the mov cr0 to be in the very last bytes of a page (so that the instruction executed immediately after paging is enabled will be at the start of a different page) the page containing the mov cr0 won't need to be identity mapped and the next page won't need to be identity mapped either.

Brendan
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