In 8086 microprocessor, suppose CS is FFFFH and IP is FAB0H Then the physical memory address would be computed by multiplying CS by 16 and adding IP. i.e. Add = FFFF0 + FAB0 This sum gives an overflow as the sum cannot be stored in 20 bits. What will happen?
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2The adder is only 16 bits, with carry out discarded. So it ends up "wrapping" mod 2^20 – Chris Dodd Feb 24 '20 at 03:52
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2Chris is correct.As an addendum and not related to your question - on an 80286 (or later processor)there were more than 20 address lines (24 on an 80286, 32 or more on 80386+). ON an 80286+ with the A20 line disabled (address bit 20 always set to 0) it wraps like an 8086 processor. With A20 enabled then there is no wrapping and you can address the 64KiB-16 bytes above the 1MiB mark. So FFFF:FFFF (highest segment:offset address) would reference physical address (FFFF<<4)+FFFF=10FFEF on 80286+ with A20 enabled. On 8086 extra bit is discarded and physical memory address 0FFEF would be addressed – Michael Petch Feb 24 '20 at 04:10
1 Answers
For 8086 the result will be truncated to fit in 20 bits; causing it to wrap around. For example 0xFFFF0 + 0xFAB0 = 0x10FAA0 = 0xFAA0
. The segmented address that points above 1 MiB then actually accesses memory in the first 64 KiB - 16 Bytes.
Newer 80x86 CPUs (starting with 80286) support wider physical addresses and don't truncate; but to uphold backward compatibility the old behavior was simulated by having a programmable "A20 gate" (that was originally outside the CPU) to mask off the 21st address bit (A20) if "A20 gate" is disabled. Because of this, for newer CPUs with "A20 gate" enabled, you can access almost 64 KiB more physical address space in real mode (up to 0xFFFF:0xFFFF = 0x10FFEF
, or 65520 bytes more than the original 1 MiB). This is called the High Memory Area.