I am trying to implement a MUX (Multiplexor) gate in the nand2tetris course. I first tried myself, and I got an error. But no matter what I changed I always got the error. So I tried checking some code online, and this is what most people use:
CHIP Mux {
IN a, b, sel;
OUT out;
PARTS:
Not(in=sel, out=nsel);
And(a=sel, b=b, out=c1);
And(a=nsel, b=a, out=c2);
Or(a=c1, b=c2, out=out);
}
But even when I try this code I still get the following error:
What I get as a truth table:
| a | b | sel | out |
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 0 |
What I should get:
| a | b | sel | out |
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 |
I have the newest software suite per 2020-01-13