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There are some questions that make me confused:

  1. Msi interrupt is a memory write request. Can msi ensure that all DMA data have been written into ram? or only ensure that the data has been transferred completely on pci bridge?

  2. If msi interrupt only ensures the data transfer completely on pci bridge. How to guarantee all DMA data write into ram when getting msi interrupt?

  3. Does msi memory write request really write into ram?

Thanks in advance.

JoyC
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1 Answers1

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Ensuring that DMA data have been written to the bus prior to the MSI write is the responsibility of the device. The device should not issue the MSI write until everything that the driver/OS needs to see with respect to the device request has been done, whether that entails memory reads, memory writes or whatever else. But, assuming things have been done in the appropriate order (on the bus) by the device (DMA write(s), then MSI write), it is then up to the host bridge to ensure that the data is written to RAM in the correct order. But typically the MSI write itself has nothing to do with any guarantees. The host bridge simply ensures that its memory transactions are executed in the order given (and the memory subsystem ensures coherence among all the CPUs and peripherals so that the data appear to have been written to memory in the correct order even if there are caches and such).

As for your question 3, the MSI write goes to wherever the device is told to send it when you setup MSI in the device registers. Typically, that "MSI memory write" is directed to an address associated with the system interrupt controller and not to actual RAM, but it's the OS/driver responsibility to configure the correct address.

Gil Hamilton
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  • Thanks for your comment. Does it means that msi only ensure that the data is transferred in order, and whether or not the data is written to RAM is handled by pcie root complex or memory subsystem? If the DDR speed is too slow, may driver gets wrong data when cpu get interrupt by pcie root complex and driver starts to deal with DMA data? – JoyC Dec 31 '19 at 02:28
  • No. MSI doesn't ensure anything. The *device* must order its bus writes such that all the data is sent first, then the MSI is sent. That means the root complex has received (and transferred to memory subsystem) all other data by the time it receives the MSI. After that, it's up to the memory subsystem to ensure that memory remains coherent. If the cpu goes to access the resulting data, it should already be there (or, it must be returned from a cache if it hasn't actually gotten to RAM yet). – Gil Hamilton Dec 31 '19 at 02:42