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I have MCU in Logisim and following asm code. It is working but I have to improve it - make it faster. How to do that? I understand that it depends on data input. My ideas - arrange input operands. For example 2*5=5+5 and the same 5*2=2+2+2+2+2 so I have to compate them first with each other and then arrange. How to do that? Any other ideas.

You can get my Logisim MCU: Download MCU.circ and instruction set Excel XLS file

Current instruction count: COMPARE = 4 STORE = 9 END = 10

Machine code: 3000 3101 2200 2300 1153 6509 0200 0130 5004 4202 500A

My asm code:

        LDR R0, 0   //Read first number from the RAM
        LDR R1, 1   //Read second number from the RAM
        LDI R2, 0   //Sets result register to zero
        LDI R3, 0   //Sets R3 (compare) register to zero
COMPARE:CMP R1, R3  //Checks if multiplication isn't already done
        BREQ STORE  //If previous compare numbers were identical, then jumt to STORE
        ADD R2, R0  //If they werent 0, then add first number to result again
        DEC R1      //Decrease second number or counter by 1
        JMP COMPARE //Jump to compare
STORE:  STR R2, 2   //Save result to 2. RAM adress
END:    JMP END     //END
Eifel
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    You want to put the lessor number in R1 and larger number in R2. That is an if-then statement, where the if condition is R1 > R2 and the then part is some reg-to-reg copy/moves, such as: R1=>R4, R2=>R1, R4=>R2. – Erik Eidt Dec 19 '19 at 01:32
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    Does your MCU have right-shift by 1 bit? For non-tiny inputs, shift-and-add is much better: O(log(n)) time instead of O(n). i.e. O(bitwidth). It can stop after shifting out the highest set bit in the number it's right shifting. – Peter Cordes Dec 19 '19 at 02:41
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    @PeterCordes The provided xls file contains: `LSR Logical Shift Right / Rd[i] = Rd[i+1], Rd[7] = 0, C = Rd[0]`, so yes, the conventional binary variant of the [Russian Peasant Multiplication](http://mathforum.org/dr.math/faq/faq.peasant.html) seems the way to go. – tum_ Dec 19 '19 at 07:09

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