4

I declared a Bundle for my specific data :

class RValue (val cSize: Int = 16) extends Bundle {
  val rvalue = Output(UInt(cSize.W))
  val er     = Output(UInt((cSize/2).W))
  val part   = Output(Bool()) /* set if value is partial */
}

And I want to use it as a register in my module :

  val valueReg = Reg(new RValue(cSize))
//...
  valueReg.rvalue := 0.U
  valueReg.er := 0.U

That works well. But I want to initialize it at Register declaration with RegInit(). Is it Possible ?

  val valueReg = RegInit(new RValue(cSize), ?? ) ??
FabienM
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2 Answers2

6

Chick's answer of using Bundle Literals is the cool new way and is nice because you can give a Bundle arbitrary values in a single expression.

If you just want to zero-out the register at reset type, you could always cast from a literal zero to the Bundle:

val valueReg = RegInit(0.U.asTypeOf(new RValue(cSize))

You can do similar things with any literal if you want, but I wouldn't recommend it unless you're zeroing out or setting everything to 1s.

For setting each field to some other value, I think Chick's way is better, but the normal style you'll see in older code is something like:

val valueReg = RegInit({
  val bundle = Wire(new RValue(cSize))
  bundle.rvalue := 1.U
  bundle.er := 2.U
  bundle.part := 3.U
  bundle
})

In Scala, you can put { } anywhere an expression is needed and the last expression in the Block will be the return value. Thus we can create a Wire with the values we want to reset the register to and then pass that Bundle as the initialization value. It would be equivalent to write:

val valueRegInit = Wire(new RValue(cSize))
valueRegInit.rvalue := 1.U
valueRegInit.er := 2.U
valueRegInit.part := 3.U
val valueReg = RegInit(valueRegInit)

I hope this helps!

Jack Koenig
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  • Thanks jkoening and @chick it's exactly what i wanted to know. – FabienM Nov 27 '19 at 06:57
  • The zero-out solution seems to be deprecated according to scala compiler warning: `[deprecated] Data.scala:488 (1 calls): litArg is deprecated: "litArg is deprecated, use litOption or litTo*Option"` – FabienM Nov 28 '19 at 15:36
  • That’s our own deprecation and it looks like code in Chisel itself is calling a deprecated function, whoops! You can safely ignore that. – Jack Koenig Nov 28 '19 at 20:31
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    Thank you for bringing this to my attention. I have PRed a fix (https://github.com/freechipsproject/chisel3/pull/1256), it should be fixed in 3.2.2 – Jack Koenig Nov 29 '19 at 21:13
4

BundleLiterals are the new way to do this. First

import chisel3.experimental.BundleLiterals._

Then

val valueReg = RegInit((new RValue(cSize)).Lit(_.rvalue -> 1.U, _.er -> 2.U, _.part -> true.B)

It's possible there will be some problem with having declared the fields in the Bundle with the OutputBinding. I would probably leave that off and just wrap with the output when necessary, e.g. 

val rValueOut = IO(Output(new RValue(csize)))
Chick Markley
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