How to detect FPU in Cortex M?

Question

Cortex-M processors implement the CPUID register, through which it is possible to detect information about the core: part number (e.g. Cortex M7 or M4), revision and patch level (e.g. r1p2), etc.

Is there a register or a way to detect if the FPU has been implemented by the implementer? And how to detect the type of FPU (VFPv4, VFPv5-SP or VFPv5-DP)?

Probably take a look at the data sheet for the relevant SOC – doron Sep 13 '19 at 20:55 — doron, Sep 13 '19 at 20:55

score 3 · Answer 1 · answered Sep 14 '19 at 16:08

In the cortex-m Architecure Reference manual,

B3.2.20 Coprocessor Access Control Register, CPACR

The CPACR characteristics are:

Purpose: Specifies the access privileges for coprocessors
Usage constraints: If a coprocessor is not implemented, a write of 0b01 or 0b11 to the corresponding CPACR field reads back as 0b00.
Configurations: Always implemented

The VFP will have implemented CP10 and CP11 (decimal). If there is no VFP, then they should read back as 0b00. This would apply to a majority of Cortex-M CPUs. As a vendor can implement there own IP, it is possible that some CPU/SOC might not work as documented. It would be prudent to trap/handle the undefined instruction which will be taken if a Co-processor is not present.

How to detect FPU in Cortex M?

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