I am writing an emulator of a subset of the RISCV specification, intending to use the compressed ISA as a baseline for my customized 16-bit instruction set. However, riscv32-unknown-elf-as
refuses to assemble the C.SW and C.LW instructions with a label acting as the immediate value.
I am aware that RV-C is only an extension of the base ISA and is not intended for standalone execution, but I would like to use the riscv32-unknown-elf-as
assembler utility as an easy way to assemble small programs for my simulator/emulator.
According to the RISC-V ISA spec (as of the time of writing), the C.SW instruction takes a 7-bit immediate value, and the value is left shifted twice (multiplied by 4) as the loads/stores are assumed to be 4-byte aligned anyway.
As a result, the following assembly is deemed legal by riscv32-unknown-elf-as
and successfully assembles:
C.SW x12, 64(x13)
One would think that if a label was correctly 4-byte aligned, representing the address 0x64, you would be able to write the equivalent assembly:
C.SW x12, my_label(x13)
However, riscv32-unknown-elf-as
refuses to assemble this line, stating:
test_asm.S: Assembler messages:
test_asm.S:4: Error: illegal operands `c.sw x12,my_label(x13)'
I have tried many combinations of this syntax, along with all kinds of alignment directives w.r.t. the label. For reference, this is the assembly file itself:
main:
.option rvc
c.sw x12, my_label(x13)
my_label:
.word 1
Is there an additional compiler directive I need to add? According the ISA spec, I would expect this to be valid assembly.