-1

I have this error code 

full_adder.vhd(18): near ")": (vcom-1576) expecting IDENTIFIER.

I have tried the following and the error still occurs, does anyone have an idea?

LIBRARY IEEE;

USE IEEE.std_logic_1164.ALL;




USE IEEE.numeric_std.ALL;




ENTITY full_adder IS
  PORT (




a_i: in std_logic;



b_i: in std_logic;




c_i: in std_logic;




s_o: out std_logic;




c_o: out std_logic;




);




END full_adder;




ARCHITECTURE calcul OF full_adder IS




signal full_adder: std_logic;




BEGIN



 s_o <= c_i xor a_i xor b_i;




c_o <= c_i and(a_i xor b_i) or (a_i and b_i);



END calcul;
MaartenDev
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Nemer Charbel
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1 Answers1

0

The last item in your ports should not have a ';'. The ';' for that port is the one after the close bracket ');'.

port (
  a_i: in std_logic;
  ...
  s_o: out std_logic;
  c_o: out std_logic   -- Do not need ';' here 
);                     -- It is here
Roger
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