VHDL Simple Seven Segment Display on Basys2 FPGA board

Question

So I am new to the FPGA world, and I am new to the VHDL language. I tried to light up my seven segment displays, but I always come across with an error. The below code just works on displaying number one on the seven segement when the switch is on and when you flip up a switch an LED turns on.

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity binarycnt is
    Port ( clk : in STD_LOGIC;
              switches : in  STD_LOGIC_VECTOR(7 downto 0);
           LEDs : out  STD_LOGIC_VECTOR(7 downto 0);
           segments : out  STD_LOGIC_VECTOR(7 downto 0);
              anodes : out STD_LOGIC_VECTOR(3 downto 0));
end binarycnt;

architecture Behavioral of binarycnt is
begin
LEDs <= switches;
process (clk, switches)
    begin
        if(switches(0) = '1') then
                segments(1) <= '0';
                segments(2) <= '0';
                anodes(3) <= '0';

        elsif rising_edge(clk) then 
            segments(0) <= '1';
                segments(1) <= '1';
                segments(2) <= '1';
                segments(3) <= '1';
                segments(4) <= '1';
                segments(5) <= '1';
                segments(6) <= '1';
                segments(7) <= '1';
                anodes(0) <= '1';
                anodes(1) <= '1';
                anodes(2) <= '1';
                anodes(3) <= '0';
        end if;
    end process;
end Behavioral;

I tried to do this:

segments <= switches

to light up any light bar with a switch on the seven segment, but I keep getting this error:

Signal segments<1> cannot be synthesized, bad synchronous description. The description style you are using to describe a synchronous element (register, memory, etc.) is not supported in the current software release.

I am looking for a way to light up the seven segment with switches, and oh, It is my first time using the clock so if my implementation is wrong, I apologise. Any help would be appreciated. Thanks.

When I try to replace `LEDs <= switches` with `segments <= switches`, It gives me the error. Basically I want to light up any segment of the seven segment display by flipping a switch on. — Fuzzyy, Sep 05 '19 at 17:41
@Fuzzyy *segments* is also affected in your sequential process. You can't affect a same signal in 2 concurrent processes. — Gautitho, Sep 06 '19 at 08:03
Then how can I make this happen? I just want to light the seven segment with using switches, like one switch lights up only one segment on the seven segment display. — Fuzzyy, Sep 06 '19 at 11:10
I don't know how your board works but you can remove your process and put only *segments <= switches* in your architeture. — Gautitho, Sep 06 '19 at 12:41

score 1 · Answer 1 · answered Sep 05 '19 at 14:48

1

Your error message is saying that your synthesiser does not know how to design a circuit that behaves in the same way as your code does. That is what a synthesiser is supposed to do - design a circuit that behaves in exactly the same way as your code does.

What circuit are you expecting? Could you draw it? Have you thought about that? When you design hardware using an HDL, you should know what hardware you are expecting to be synthesised. Not exactly what hardware, but roughly.

Did you simulate this code? Did it behave as you were hoping? Always simulate before you synthesise.

Once you know what hardware you are expecting to be synthesised, you can write your (V)HDL accordingly. You VHDL should conform to one of a small number of templates. There is more about those here.

answered Sep 05 '19 at 14:48

Matthew Taylor

13,365
3
17
44

I am expecting a circuit that connects my switches to the segments of the seven segment display on my board. A cross mark on the synthesiser appears when I replace `LEDs <= switches` with `segments <= switches`. And I didn't simulate my code. I just save it and generate the programming file, then run it on my FPGA board. I will get used to simulating after you mentioned how important simulating was, thanks. :) – Fuzzyy Sep 05 '19 at 17:44
1

*"And I didn't simulate my code."* Always, always simulate your code. I have 30+ years experience in HDL and I *still* simulate even very small pieces of HDL. It is just too easy to get it wrong. – Oldfart Sep 05 '19 at 20:33
@Fuzzyy But what circuit? For example, will it contain flip-flops? Or not? – Matthew Taylor Sep 06 '19 at 07:45
No it won't contain any flip-flops. I am just trying to find out how can I light up the seven segment with only using switches, it is a learning step for me. – Fuzzyy Sep 06 '19 at 11:08

VHDL Simple Seven Segment Display on Basys2 FPGA board

1 Answers1