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As we know, one high-level language instruction like "counter++" in C++ will be translated into several assembly langauge instructions.

My question is what about a single assembly language instruction? Is it true that some assembly language instruction will also be translated into several machine instructions that hardware can directly reads?

If positive, when thread/process scheduling occurs, is it true that context-switch(or other stuff needs to be done during scheduling) takes place as soon as CPU finishes executing its current machine instruction, even if there are several instructions left which form a single assembly language instruction together with the current one?

For example, one assembly language instruction A may be translated into machine instruction a1 ,a2, a3. Can context-switch happene between a2, a3?

corresponding machine instructions of a single assembly language instruction A:

a1 (executed) a2 (executing..) <--- next context switch is about to occur a3 (not executed yet) <--- Am I be able to execute before the next context switch?

My guess is a3 will not be executed because the hardware only knows its machine instructions and have no idea of assembly language. So each instruction is executed separatedly. Am I right?

Eric Z
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  • Are you talking about inline assembly, or writing purely in assembly? Which assembly flavor are you referring to? The reason I ask is that I don't know, but I suspect that C/C++ does not define a standard on inline assembly. Also, the answer to this question may be highly dependent on the assembly flavor you are using. – Merlyn Morgan-Graham Apr 21 '11 at 02:58
  • Merlyn, what do you mean by inline assembly? I'm not an expert on assembly though. – Eric Z Apr 21 '11 at 03:11
  • In many C compilers, you can write a C function, and write assembly inside your function to implement it. It sounds like you're not talking about this. – Merlyn Morgan-Graham Apr 21 '11 at 03:37

2 Answers2

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Actually, on quite a few machines, counter++ will translate to a single instruction (e.g., inc counter).

Pretty much the definition of assembly language is that what you're writing is simply mnemonics for the actual machine code, so one assembly instruction converts to one machine instruction.

Some CPUs (x86) are micro-coded, so what you enter as a single instruction is actually executed as a series of micro-ops. The exact mapping from instructions to micro-ops isn't usually documented (e.g., Intel did around the Pentium Pro/Pentium II time frame, but mostly doesn't any more).

Interrupts come in two varieties. Most will only be executed after the current machine instruction finishes execution. A few, however, can interrupt during the execution of a single instruction. A typical example would be attempting to access a page of memory that's not present. If you do this, the machine will interrupt the current instruction, and jump to the exception handler. The exception handler will normally page in the data for that address. When it returns, the data is present for the address. The instruction re-starts, and can successfully execute.

Jerry Coffin
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    the example you gave is about page fault where the current instruction is trying to access a memory that's NOT present. Is it? I know certain interrupts like this need to be handled immediately/synchronously, but what about the scheduler? The current thread will not be preempted until the current instruction finishes, is it? – Eric Z Apr 21 '11 at 03:19
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Sometimes during assembly, the assembler might sneak in a NOP in order to pad or maintain alignment. Depends on the processors and all sorts of things. But pretty much assembly instructions translate 1:1 to machine instructions.

In general, the CPU will finish its current instruction and then respond to the interrupt. My only qualification there is that in some CPUs there are some instructions that can actually take quite a long time. For example, the Z80 has a block move instruction that can take a "long" time, especially in CPU terms, and x86 has its vector instructions, etc. So I don't know if those instructions are stopped in the middle and restarted later or if the CPU waits for them to finish.

But as for interrupts in general, yea they happen "between" machine instructions.

Will Hartung
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