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I am curious to learn about the technology which is used in generating software clock in simulators. The frequency of my machine is only ~2.4GHz but I can generate up to 500THz clock using a simulator(Refer below system Verilog snippet ).

`timescale 1fs/1fs;//This is the minimum time-unit and precision that can be used to generate 500THz clock
module temp();
  bit clk_b;
  always #1 clk_b =~ clk_b ;
endmodule

Is this higher frequency just a software illusion or does it have any link with CPU crystal oscillator?

Taimoor Suleman
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Sreejin TJ
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2 Answers2

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The simulation does not "run" in realtime. So it will compute the result for the steps and if it is done it is done. Which means that the ratio between number of required steps (as well as problem complexity) and your computer performance will define how much time the simulation will need to finish. The timescale setting of the simulation is just what it says: a way to relate the simulation steps into a time(scale).

So it is really an "illusion" if you want to call it so.

Christian B.
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    in other words `timescale` only defines format of `#delay` and the `time` output. It does not affect much else. – Serge Aug 01 '19 at 10:39
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SystemVerilog is a HVL i.e. a Hardware Verification Language. It is (mostly) used to verify hardware designs.

The main purpose of the language is to provide a platform where one can create logic to verify the DUT by running simulations i.e. generating different operating conditions for the DUT and checking how it behaves under each condition. But this does not necessarily mean that DUT is supposed to operate in such extreme conditions generated by the SystemVerilog testbench.

When you are generating 500THz clock from your testbench and checking the behaviour of your DUT, you are making sure that the DUT is not (virtually) going to break down even in such extreme conditions. But please note that this is just a virtual environment you have created and not the actual environment under which the DUT once synthesised is supposed to operate.

If the maximum frequency of the machine (or DUT) is ~2.5GHz, it is supposed to operate at that frequency in the actual environment, but just out of curiosity you can even check operation of DUT with different input clock frequencies by generating different simulations.

Hope it helps!