In virtualization,is sensitive instructions an issue because it probably gets executed in non-privileged mode without getting trapped or raising an interrupt?
For virtualization; sensitive instructions would be a major problem if they aren't trapped.
In hardware-assisted virtualization, is the Intel-VT, AMD Pacifica solving the problem by actually executing the sensitive instruction or it is just creating a interrupt trap? Is Hypervisor catching the trap from Intel-VT/AMD Pacifica and then choosing to execute the sensitive instruction or not?
For hardware-assisted virtualization; the CPU sees the sensitive instruction and switches to the hyper-visor (e.g. "VMEXIT") instead of executing the sensitive instruction; and the hyper-visor emulates the instruction (it doesn't ignore the instruction or ask the CPU to execute the instruction).
The emulation of an instruction may be very simple (e.g. clearing a bit in a variable somewhere in response to a cli
instruction) and may be very complicated (e.g. using sockets on the host to emulate the behavior of a real NE2000 network card to emulate an out
instruction in the guest).