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Seeing this CPU implementation, I am utterly confused (and it is not just because the control bits aren't connected with anything; it is my task to connect those).

The first thing that confuses me is that if the upcoming instruction is a c-instruction, what is then going to happen? Let's say the Mux16 is going to let the c-instruction through ... the instruction is then passed through the A register ... why would you want that?!

If my understanding is correct, that would, depending on the control bit, either do nothing (the control bit (load) is false), or the A register will now store the instruction no matter what the instruction specifies ...

Am I missing something here?! What is going on? Why is that functionality desired?

enter image description here

(The source of the CPU implementation is: link go to time 3:30)

xing Zì
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2 Answers2

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The individual c markings in this diagram do not refer to the "cccccc" bit field in the instruction. They are single bit control lines (the nomenclature could be a little clearer; the C's that go into the ALU are actually the cccccc bits!)

As such, the incoming instruction doesn't just go to that first Mux, it goes all over the place.

Convention: rightmost bit is 0, leftmost bit is 15. So the jjj bits are bit 0, 1, 2, ddd are 3-5, cccccc are 6-11, a is 12, etc.

Consider the leftmost Mux16. It has two inputs, the ALU output and the instruction itself. The control bit it needs it the bit that determines if the instruction is a direct load (ie: the lower 15 bits of the instruction are the data to be loaded into the A register) or not.

This is bit 15. If it is 0, then it's a A instruction, if it's a 1, then it's a C instruction.

What I did in my implementation is define a control line called aInstr like this:

Not(in=instruction[15],out=aInstr);

And then use a Mux16 to generate the proper input for the A register:

Mux16(a=ALUout,b[15]=false,b[0..14]=instruction[0..14],sel=aInstr,out=AREGin);

So if aInstr is false, the Mux16 passes through the output of the ALU, and if it is true, it passes through the instruction with the leftmost bit cleared. And that is what is fed into the A register at the end of the instruction cycle.

You have to do similar things for all the other components.

Note the use of bit fields to generate a 16 bit input with a 0 high bit and 15 bits from the instruction (the "b" input to the Mux). This is a feature of HDL that comes in very handy; you can also use it to split up the output into sub-buses, and they can overlap!

The task of creating the CPU is basically figuring out what the inputs and outputs of each of the functional units are, and what instruction / cpu bits control them. The tricky bits are figuring out what the various outputs should be in special situations (like reset and what do you do with the ALU output when you're not performing an ALU operation)

Don't give up! You'll get a good feeling when it all falls into place!

MadOverlord
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  • Wait, so the instruction is only let through the Mux16 gate (the one the arrow points to in the img of my question) if the instruction is an a-instruction? If the instruction is a c-instruction, I am supposed to handle it before the instruction reaches the Mux16 gate, Right? – xing Zì Jul 23 '19 at 09:38
  • No. Please re-read my comment. The instruction bits are an input to that mux, because they need to be sent to the A register if it's an A instruction. But they are also inputs to many other functional units at the same time. Those "c" inputs don't mean the "cccccc" bits of the instruction. They mean individual control bits, which come from various positions in the instruction. Each bit in the incoming instruction can be directed to multiple functional units if needed. – MadOverlord Jul 23 '19 at 21:42
  • You should carefully re-read the relevant slides in the Nand2Tetris course, in particular : https://docs.wixstatic.com/ugd/56440f_96cbb9c6b8b84760a04c369453b62908.pdf – MadOverlord Jul 23 '19 at 21:44
  • Forgot about the memory register convention. Spent like 3 hours trying to figure out why my A instruction flag wasn't loading in correctly! Thanks. – David Biggs Jun 29 '21 at 02:42
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I just completed the CPU task this afternoon so I have a few thoughts. Nand2Tetris is a great course but it gross over a lot of details and feed you the result without much explanation.

A few notes:

    1. ALU always runs and outputs, regardless of whether you want it or not
    1. CPU (ALU) only directly manipulates the data in three registers
    1. ALU has two inputs of 16-bit numbers

Point 2 answers your question of "Why instruction needs to go through A register". Basically the ALU has to take the instruction from somewhere, and it can only interact with the registers, so it's either A or D register. Now the next question is, why not from D, but from A? Because if you look at the ALU control bit table (the one with c1 ~ c6), you will see that you can either have A on the left side, or M on the right side, while D appears on both sides. This pretty much means that we need a MUX for A register and M register.

Nicholas Humphrey
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