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For example in a 5 stage pipeline with the following instruction set:

add $t3, $t1, $t2
add $t6, $t4, $t5
sw $t3, 4($t6)   //is there a dependency on $t3 and $t6?
add $t6, $t6, $t3 //does the add have to wait until sw stores $t3 into the memory?

I am not sure if the sw has dependencies on both the rt and rs field, which the rt would be $t3 and rs would be $t6 in this case. From what I learned, there will be a $t3 dependency as the thing inside the $t3 register will be stored into the address of 4($t6), but I am confused if there will be a dependency on $t6 (since the add $t6, $t4, $t5 instruction writes to $t6).

Also, I learnt that there is a dependency on the rs field for the load word (lw) instruction but I am not too sure about the rt field since the load word instruction will overwrite the rt field regardless of what is in it?

add $t3, $t1, $t2
add $t6, $t4, $t5
lw $t3, 4($t6)   //is there a dependency on $t3 and $t6?
Anshu
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LordOfFlies
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  • The `sw` needs to know the values of both $t3 and $t6 to execute, so there is a dependancy. Likewise for the `lw`. – markgz Jul 22 '19 at 17:09
  • I don't really understand how lw needs both $t3 and $t6 since it over writes $t3 regardless of what is in it? Or is this dependency due to the fact that it needs to wait until the first add instruction finishes so the first add does not over write the load word's $t3? – LordOfFlies Jul 23 '19 at 08:02
  • This is a 'write after write' hazard. The previous write must complete before the `lw`'s write completes. – markgz Jul 24 '19 at 18:06

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