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I'm trying to write some code for the stm32f103c8t6 microcontroller. It is constantly communicating with a device, which requires interrupts to be disabled... however, this also needs to be interrupted immediately by the falling-edge of a certain GPIO pin.

Without disabling interrupts, the communication fails occasionally, with sporadic delays of about 45 clock cycles. Disabling all interrupts by setting the I bit of the CPSR register fixes this problem entirely, making me think it's a interrupt problem... however, then my GPIO interrupt doesn't work, so this isn't a solution.

I've tried clearing all enable bits in the NVIC, except the one used for my GPIO interrupt, but the problem still occurs.

Are there any interrupts which aren't handled by the NVIC which might be causing the problem? Or does anyone have any other ideas? Any help or ideas would be much appreciated! Thanks.

Electro Modder
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  • A delay of 45 cycles looks suspiciously like a short interrupt handler. If the linked solution does not work, come back with a new question, detailing this communication protocol. There might be ways to get the timing right with some assistance from hardware. – followed Monica to Codidact Jun 02 '19 at 05:10
  • This is a sign of the app design problem. You should look for the error somewhere else in the code. – 0___________ Jun 02 '19 at 10:49

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Use priority grouping - you will disable interrupts with priority lower that you set.

0___________
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  • Thanks a lot! This actually worked like a charm. I still have no idea what interrupt was causing the problem... but setting the priority of my interrupt to the maximum and "thresholding" with the BASEPRI register did the trick! – Electro Modder Jun 02 '19 at 17:05