My goal is to produce a switch track for controlling the position_track
and color_track
for player1
(9-bits) and player2
(9-bits) for the board display in a VHDL-based Tic-Tac-Toe game.
Currently, I'm able to display the 3x3 grid and show the color for the switches. Only for player1
('Blue') which is assigned to SW[9]
to SW[0]
in the Altera DE2 board. player2
('Red') is not responsive in the VGA display for any of the SW[17]
to SW[9]
.
This is for a project using VHDL with the Altera DE2 board, Cyclone II chip. In the past, I have attempted to check the syntax for entity an architecture (behavioral method) to specify the logic for tracking changes in the built-in hardware switches in the FPGA board.
Used standard libraries such as ieee.std_logic_1164.all and ieee_std.logic_unsigned.all.
FPGA
architecture behavioral of switch_track is
begin
process
begin
if (player1(0) = '1') then
position_track(0) <= 1; -- error occurs in this line (19) --
color_track(0) <= 1;
elsif
-- [same logic applies for player2(0)]
else
position_track(0) <= 0;
color_track(0) <= 0;
end if;
end process;
end architecture behavioral;
I expected that the code in the .vhd file could be synthesized correctly. However, the only error encountered in the Quartus II compiler is:
Error (10517): VHDL type mismatch error at switch_track.vhd(19): std_ulogic type does not match integer literal.
I'm not sure why std_ulogic
shows up in the compiler. I'm new to VHDL and Quartus II hardware design. Constructive feedback is appreciated.