In RISCV privileged spec page 75 mention a term "non-idempotent memory-mapped I/O". What is non-idempotent memory-mapped I/O? Is it about non side effect?What is design concern about non-idempotent memory-mapped I/O?
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It means writing the same value twice is not the same thing as writing it just once.
e.g. an MMIO register where a write transaction triggers a UART to send the bits out over a serial port.
Unlike for a control register where writing the value that's already there has no effect. Or e.g. a parallel port where the external pins reflect the bits in the MMIO register, and writing them again doesn't change anything.

Peter Cordes
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