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I want to flash a M0+ device via SWD. This is realized by a host processor instead of a programmer.

Im already able to write and verify into RAM but not into flash.

It seems to be a bit different from the M3/4 cores so it does not work for M0+.

Maybe does someone of you help me with a compatible sequence to make a chip erase and a write command via SWD on M0+?

thanks Daniel

artless noise
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RixRax
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  • swd talks to the cortex-m, arm and the cortex-m are not the chip, they are just a part of it, purchased ip used by the chip vendor. whatever lives beyond the ahb/axi busses is chip vendor territory in particular the flash and flash controller. – old_timer Mar 18 '19 at 17:38
  • what chip are you using and what happened when you tried the existing tools? – old_timer Mar 18 '19 at 17:49

1 Answers1

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Flash erase is device specific. You generally can't just write values to flash, you need to use the flash controller to first erase a block, then perform write/verify accesses repeatedly till the value is stable. This write stage is generally automated by the controller too.

Since the flash is where code is generally run from, you also need to first copy your code download routine into ram, and execute from RAM whilst the flash is busy.

All of the accesses can be performed over the processor, or by an external debugger. If you want to perform the access by SWD, your debug software needs to be aware of the exact target device, it's memory map, and the requirements of the flash controller. All of this information should be in the datasheet for the device which you're using (and will be supported by the manufacturer's toolchain somewhere).

If you write your own flash routine, be sure to stick to the speficification. Flash is rather an analogue component, and even if you don't destroy the chip, you might still rather easily get to a state that is hard to recover from.

Sean Houlihane
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