2

Page 14 of this STM32F7 architecture overview document shows memory addresses for:

  • FLASH-ITCM (unkown size on the F730 I'm using)
  • DTCM-RAM (64KB)
  • ITCM-RAM (16KB)

What is the difference between these? A lot of examples show data going into DTCM. Where are things like a stack or critical function best suited?

Is there any benefit to using the flash ITCM interface over the ART accelerator?

RobC
  • 502
  • 4
  • 17
  • DTCM and ITCM are ARM Cortex-M technologies. The ART is STM32 specific and does not exist on other SOC lines, such as [tag:kinetis], etc.. See Also: [Cache vs TCM](https://stackoverflow.com/questions/36328344/what-is-the-difference-in-cache-memory-and-tightly-coupled-memory). Also, I don't think the TCM exists on most STM32 chips except the F7 series, whereas the ART (flash caching) is found on many. – artless noise Aug 08 '22 at 14:59

1 Answers1

3

The difference between DTCM and ITCM is which bus they're attached to, the DTCM is on the D bus so used for data, this is the ideal place to store your stack, the ITCM is on the I bus so used for fetching instructions (code), this is a good place to store your critical routines.

The ART accelerator is between the Flash and the ITCM, so it's not an either or. It's advantageous to use the flash via ITCM for code as that way you do get acceleration whereas through the AHB bus you don't. All the flash is available via either the ITCM interface, or the AHB bus, depending on which address you use; 0x0020 0000 to 0x0027 FFFF is via the ITCM, 0x0800 0000 to 0x0807 FFFF via AHB, both sets of addresses are pointing to the same area of flash.

Colin
  • 3,394
  • 1
  • 21
  • 29
  • So normal mode with ART uses the AHB bus, flash ITCM bypasses the AHB, but shares the bus with ITCM-RAM, and DTCM is fully isolated. – RobC Mar 01 '19 at 01:39
  • Not quite, using flash via ITCM uses the art accelerator, using flash via the AHB bus you don't get acceleration. – Colin Mar 01 '19 at 09:54