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I'm trying to get the double precision FPv5-DP-D16-M FPU working on an ARM Cortex-M7f with an arm-none-eabi-gcc compiler. Based on the documentation, it would appear that I have two options to choose from for enabling the FPU: -mfpu=fpv5-d16 and -mfpu=fpv5-sp-d16. The "fpv5" is pretty self explanatory and the "d16" (as mentioned in the documentation and in other StackOverflow questions) just indicates that there's an equivalent of 16 double precision registers instead of the nominal 32 registers. For lack of anything else that makes sense, I'm guessing the "sp" stands for "single precision" which would imply that fpv5-d16 is the option I want.

However, I can't find any documentation that explicitly confirms this. Is my deduction correct and why is there no fpv5-dp-d16 option/alias like there appears to be in clang?

user2465116
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Your deduction is correct, yes. You can just refer to the Arm Cortex-M7 Processor Technical Reference Manual to see which ISA configurations were available to begin with.

Said this, I don't really know what the original ARM engineer adding support for it in gcc may have been thinking (perhaps there's some hardware shenanigan justifying that?). Anyway I'm under the impression "proper practice" in latest gcc versions is just to use something like -march=armv7e-m+fpv5+fp.dp. And perhaps for this reason nobody really brainstormed to look at all the aliases you could care (indeed, you can see already in patch 28 of my last link fpv5-d16 was almost an afterthought).

But I guess like developers would be open to any suggestions?

mirh
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