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I am going through David Patterson and John Hennessy's computer architecture book. In chapter2, it mentions that we may need to make two separates request to read tag and data in two cycles if we store tags in DRAM. My question is why do we need to request tag at all? Isn't the tag is just higher bits of the address?

Peter Cordes
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Shibo Chen
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  • This only applies if you have a cache that stores tags in DRAM, which kind of defeats the purpose of a cache, unless it's a separate fast DRAM that's a lot faster than main memory. If you had to access main-memory DRAM even on a cache hit, why not just access it for the data? Some caches use external (off-chip) RAM for the data, usually SRAM though. And definitely separate from main memory. But more typically, older CPUs will use on-die tags and off-die SRAM for data, so cache hit/miss determination is very fast. – Peter Cordes Jan 01 '19 at 04:14

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Wow - I read Patterson and Hennessy in grad school, a long, long time ago ;) Thanx for the trip down Memory Lane ;)

Here's what's going on:

https://www.webopedia.com/TERM/T/tag_RAM.html

The area in an L2 cache that identifies which data from main memory is currently stored in each cache line. The actual data is stored in a different part of the cache, called the data store. The values stored in the tag RAM determine whether a cache lookup results in a hit or a miss.

In other words, there are two different "things" (the tag, and the data) in two different "places" (the cache line, and the data store). If it's a "hit", you only need to do one lookup (to the cache line).

So why have a "tag" at all? Because different regions of memory may be mapped into a block, the tag is used to differentiate between them.

paulsm4
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