VHDL allow to pass real (floating point) numbers through ports?

Question

For this code:

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use IEEE.math_real.all;

entity FPP_MULT is
  port(A        : in  integer;  --input operands
       B        : in  real
       );
end FPP_MULT;

architecture (...)

Output:

Error (10414): VHDL Unsupported Feature error at real.vhd(8): cannot synthesize non-constant real objects or values Error: Quartus II Create Symbol File was unsuccessful. 1 error, 0 warnings

Read the error message. It is not about the port. Quartus (and every other synthesis tool I know) can **not synthesize** reals/float numbers. — Oldfart, Dec 15 '18 at 20:57
IEEE Std 1076-2008 5.2.5 Floating-point types "An implementation shall choose a representation for all floating-point types except for universal_real that conforms either to IEEE Std 754-1985 or to IEEE Std 854-1987; in either case, a minimum representation size of 64 bits is required for this chosen representation." Type real is host implementation dependent. Also see Annex D Potentially nonportable constructs. Instead consider using a synthesis eligible instantiated package float_pkg type float where the *binary* format can be portably specified. — , Dec 15 '18 at 23:21
See [VHDL-2008 Support Library](https://github.com/FPHDL/fphdl) on github. There's a -1993 compatibility version that's successfully been used with Quartus II. — , Dec 16 '18 at 00:23

score 0 · Answer 1 · answered Dec 15 '18 at 22:29

You can use any type in a port declaration including real. But ...

VHDL is a simulation and documentation language for digital circuit behavior. Some clever folks found out, that a subset of the language can be synthesized. Type real is not in the synthesizable subset. Even if it could be synthesized by one tool, it would not behave the same way in other tools. It would be a non-portable item.

VHDL allow to pass real (floating point) numbers through ports?

1 Answers1