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I have an understanding problem when it comes to PCIe connections. In the PCIe interface data is transferred between devices using TLP packets. In a memory mapped configuration if a piece of software wants to send data to a device, then it must write the data to a predefined memory location, which is mapped to this specific device.

When are the TLP packets created? Is the data stored in memory and the device has to "fetch" the data using TLP packets (e.g. memory read), or does the MMU of the CPU automatically detect, that this is a mapped memory region and automatically "converts" the data to TLP packets and sends them over the interface?

Thank you in advance!

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The CPU generates a memory transaction using the physical MMIO address. Based on the address, the memory transaction is routed to the appropriate root port. Up to that point the operation is outside the scope of the PCIe spec. The root port constructs the TLP and sends it out over PCIe. If the operation is a read (requiring a response), the root port receives the response TLP from the device with the data and sends the data back to the proper CPU.

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