Analogue to vlib and vmap in Xilinx Vivado

Question

I have a testing environment that I need to port to Xilinx Vivado.

What are the Vivado analogues to Modelsim vlib and vmap ? Please include entire command with any relevant details.

Answer 1

There is no equivalent to vlib and vmap in Xilinx xSim.

It has these executables:

• xvhdl - like vcom - the VHDL compiler
• xelab - like vopt or vsim -opt - the elaboration tool
• xsim - like vsim - the simulator

xvhdl is not needed, you can call xelab with a file list and it will compile everything.

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I'm not sure if it's worth porting a simulation environment to xSim, because it has many bugs and very poor VHDL-2008 support.