We know that on x86 when power is on, CS register is set to 0xF000 and IP is set to 0xFFF0. And the instruction at 0xFFFF0 is jmp far 0xF000:0xE05B
. The question is why is it 0xE05B
but not other addresses? If it is for compatibility, how does its BIOS designer think? Is there any special reason or just pick a random address?
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Michael Petch
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Lime
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The physical address 0xFFFF0 (0xF000:0xFFF0) is part of the BIOS address space. The address that gets jumped to from there is BIOS dependent so may not always be jmp far 0xF000:0xE05B
. The address you show is typical for some of the virtual BIOSes, but doesn't have to be that specific address.

Michael Petch
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