-3

What does this code say? How do i interpret its circuit? 

module add(input logic clock, output logic[7:0] f);
    logic[7:0] a, b, c;
    always_ff @(posedge clock)
    begin
    a <= b + c;
    b = c + a;
    c = a + b;
    end
    assign f = c;
    endmodule
dave_59
  • 39,096
  • 3
  • 24
  • 63
Megan Winchester
  • 11
  • 2
  • don't mix blocking and unblocking assignments this way. you might end up with simulation/synthesis mismatch and/or races in simulation. – Serge Oct 14 '18 at 17:18
  • I thought that was the point of the question – dave_59 Oct 14 '18 at 17:40
  • If i take the initial values of a = 11011100, b = 00110011 and c = 10101010, then what would be the final values a,b,c and f? I'm not able to understand how I'm supposed to do the addition because both blocking and non-blocking statements have been used. I also want to know what circuit elements would be used to make this circuit. – Megan Winchester Oct 17 '18 at 12:10

1 Answers1

0

You should interpret this code the same as 

module add(input logic clock, output logic[7:0] f);
  logic[7:0] a, b;
  always_ff @(posedge clock)
    a <= b + f;
  always_ff @(posedge clock)
    b <= f + a;
  always_ff @(posedge clock)
    f <= a + b;
 endmodule

This is logically equivalent to what you wrote, but gives predictable simulation results for any code that samples the output f on the posedge clock

dave_59
  • 39,096
  • 3
  • 24
  • 63
  • What would the circuit look like? – Megan Winchester Oct 14 '18 at 15:12
  • I do not thing that this is equivalent. it will have different results for `c/f` and might cause sim/synt mismatch. – Serge Oct 14 '18 at 17:13
  • @MeganWinchester I do not have tools set up to draw schematics. I thought you were just curious about the mix of blocking and non-blocking assignments, A *real* circuit would require a reset. – dave_59 Oct 14 '18 at 17:36
  • @Serge By itself, there is no differences in result for `c/f` There is only a possibility of simulation difference when f is used in the rest of the design do to races – dave_59 Oct 14 '18 at 17:38