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HDL languages allow the ports to be bi-directional (eg: inout in verilog). what can be disadvantage of have bi-directional port from post silicon point of view. why can't we write all the ports bi-directional?

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    Possible duplicate of [What is the exact criteria for an inout port, when sometimes inout and output ports can be interchangeably used in Verilog?](https://stackoverflow.com/questions/34240058/what-is-the-exact-criteria-for-an-inout-port-when-sometimes-inout-and-output-po) – Serge Oct 10 '18 at 23:31

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HDL is used to describe hardware, and a digital port on a module or chip can either be input (only sense level), output (only drive level) or bidirectional (both sense and drive level).

So to describe the hardware correctly using HDL you should use the port mode that reflects the hardware operation, thus either input, output or bidirectional.

Using the correct port mode makes it easy to trace signals through a design, since you can determine what module drives a signal (output) and what modules sense (input) a signal.

Having multiple bidirectional ports that connects to the same signal usually indicates that there are multiple drivers for that signal. Some hardware, like an FPGA, does not support this for internal signal, so declaring all ports as bidirectional may result in errors if trying to synthesize that design for an FPGA.

Morten Zilmer
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Using input/output ports allows linting tools to check for extra errors in your design, like directional connection errors (!), i.e. when you write into an input port.

Some methodologies can based on directions, for example, methodology usually requires all inputs be connected and allow for dangling outputs. You cannot do it with inouts. There are other analysis rules based on the directions as well.

Simulation can take advantage of the directions to do some extra optimizations or partitioning. In general it does not care when it flattens the whole design. Synthesis most likely does not care, but can also run some checkers.

Serge
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