The instruction cache isn't a Linux kernel subsystem - it's part of the CPU.
Fetching code from main memory takes a lot of time, so CPUs use cache memory to cache code sections. This is the instruction cache that holds copies of instructions (code) that the CPU has a reason to believe will be needed soon.
If you change the instructions (code) in memory, as the example referred to does, but do not flush the instruction cache, your changed code might mysteriously fail to run until some random point in time where the instruction cache entry holding the instruction you replaced gets cleared.
mp-IRQ is short for Multiple Processor Interrupts. The problem related to in this context is that on a SMP (multiple CPU or multi core) system, the code that plants your trace point might be running on one CPU, while another is executing it. To handle that safely you need to do the very complex task of syncing al the CPU to make sure the code you are trying to patch is not being use on some other CPU by an interrupt.