I'm trying to understand about UVM automation macro. among other things, i found some sentence "UVM system Verilog call library also includes macros that automatically implement the print, copy, clone, compare, pack and unpack methods and more" from text.
and I found that lots of example used with the following usage. For example,
....
uvm_object_utils_begin(apb_transfer)
'uvm_field_int(addr, UVM_DEFAULT)
'uvm_field_int(data, UVM_DEFAULT)
...
uvm_object_utils_end
but I didn't get it. that usage of 'uvm_field_int() is just defining the variable not copy, clone, compare....
How do I understand what uvm automation macro to do? even I also curious about why those things are named as a automation? I can't find any something auto kind of thing.