#interrupt-cells is 2 but interrupts is a 3-tuple

Question

I was looking at the device tree for the Beagle Bone Black and started with am57xx-beagle-x15.dts. Drilling down into dra7.dtsi I found gpio1:

gpio1: gpio@4ae10000 {
            compatible = "ti,omap4-gpio";
            reg = <0x4ae10000 0x200>;
            interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
            ti,hwmods = "gpio1";
            gpio-controller;
            #gpio-cells = <2>;
            interrupt-controller;
            #interrupt-cells = <2>;
        };

I had read that #interrupt-cells gave the number of u32s or cells that one would expect in an item in the the interrupts list. But when I look at interrupts I see a 3-tuple: <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>. Would love to know, why does this contain 3 cells and not 2?

Please note that `am57xx-beagle-x15.dts` is **not** a BBB related file. It's for the BeagleBoard X15! — TBR, Aug 07 '18 at 10:12
@TBR - Thanks! Well, I'm not even looking in the right place :'( Still puzzled by the number of interrupt-cells though.... — Jimbo, Aug 07 '18 at 10:47

Chan Kim · Answer 1 · 2023-05-03T09:28:06.650

It's a very late answer but add one so that someone could get help.
I can't find the exact dts file from my current linux 5.15 source. But the interrupt-parent of the node should have required 3 cells for the interrupts property. For gic, normally it requires 3 values - {interrupt type, interrupt number, flag}. It's in the device binding document of gic (Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml in linux 5.15)

  "#interrupt-cells":
    const: 3
    description: |
      The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
      interrupts.

      The 2nd cell contains the interrupt number for the interrupt type.
      SPI interrupts are in the range [0-987].  PPI interrupts are in the
      range [0-15].

      The 3rd cell is the flags, encoded as follows:
        bits[3:0] trigger type and level flags.
          1 = low-to-high edge triggered
          2 = high-to-low edge triggered (invalid for SPIs)
          4 = active high level-sensitive
          8 = active low level-sensitive (invalid for SPIs).
        bits[15:8] PPI interrupt cpu mask.  Each bit corresponds to each of
        the 8 possible cpus attached to the GIC.  A bit set to '1' indicated
        the interrupt is wired to that CPU.  Only valid for PPI interrupts.
        Also note that the configurability of PPI interrupts is IMPLEMENTATION
        DEFINED and as such not guaranteed to be present (most SoC available
        in 2014 seem to ignore the setting of this flag and use the hardware
        default value).

ADD (2023.5.3) :
And the gpio node itself is a kind of interrupt controller, hence the property 'interrupt-controller'. And the '#interrupt-cells = <2>' in the gpio node itself says how interrupt outputs are specified for its 'interrupt-generating' child devices.
This is from Documentation/devicetree/bindings/gpio/gpio-zynq.txt of linux-5.10.00.

- interrupt-controller  : Marks the device node as an interrupt controller.
- #interrupt-cells  : Should be 2.  The first cell is the GPIO number.
              The second cell bits[3:0] is used to specify trigger type and level flags:
                  1 = low-to-high edge triggered.
                  2 = high-to-low edge triggered.
                  4 = active high level-sensitive.
                  8 = active low level-sensitive.

#interrupt-cells is 2 but interrupts is a 3-tuple

1 Answers1