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Using the Rocket-Chip generator I can create Verilog output and the C++ emulator using the built version of Verilator.

I'd like to use Verilator to generate SystemC code using the default config Verilog output but getting errors.

I'm using the simple command line;

verilator -Wall -sc freechips.rocketchip.system.DefaultConfig.v

And seeing errors like;

Cannot find file containing module: AsyncResetReg This may be because there's no search path specified with -I. Cannot find file containing module: plusarg_reader ...

Has anyone done this or know what I'm missing? (include path?)

Thanks

Jack Koenig
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MikeG
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  • Thanks for the suggestion... but I don't see this dir in my structure. I have Verilog under the vsrc directory and under 'src' I see main/scala but nothing else. Digging into the scala path I only see scala code. I will need to restart this process in a new environment. I may try using the makefile that comes with the examples (like sc_hello_world) which seems to be a bit different than the instructions in the manual. If that doesn't help hopefully I will have the src/main/resources/vsrc dir. Thanks – MikeG Jul 28 '18 at 14:36

1 Answers1

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You can find the extra verilog source files in src/main/resources/vsrc.

colins
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