arm - interrupt enabling

Question

I'm trying to enable interrupts and timer 2 on Allwinner A20 (User Manual).

cpsr reads 0x60000113. GICD_CTRL reads 1. GICC_CTRL reads 1. GICD_ITARGETSR0 reads 0x01010101. And GICD_IIDR reads 0x0100143b.

IRQ_ENABLE_REG of the timer was enabled. STATUS_REG also changed after the timer counted down once.

But I still cannot get it running into IRQ handler. What did I miss?

Answer 1

What I've ignored is to check the base address of exception vectors, which was written in pre-booting. IRQ behaves normally after resetting.