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In intel flat memory model, mostly 2 GDT indices are used always, CODE segment, DATA segment, Can I use more GDT indices in flat memory model. My requirement is to have one memory region with RO which is now in data segment.

Peter Cordes
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martin
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  • Can you be more specific about what you want? I think you want to make a region in the middle of one segment be read-only. Segments are chosen based on the instruction format, not based on the numeric address used. You can do that with paging, or (I think) with the MTRR to make a WP = write-protect region. [How MTRR registers implemented?](https://stackoverflow.com/q/13297178). I'm not sure if WP is cached normally, though. – Peter Cordes Jun 26 '18 at 20:28
  • The code segment can also be used as read-only data segment. Since it's a flat code code segment it will refer to the entire address space including the region you want to be read-only. Of course since the data segment is also flat, it will provide read/write access to the entire address space including the region you want to be read-only. If you're trying to protect a region of memory from being written to then you either can't use the flat memory model or you need to use some method of protecting memory other than segments like Peter Cordes described. – Ross Ridge Jun 27 '18 at 03:26

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Yes, you can use as many GDT entries as makes sense for your use. But only 6 can be active at once since there are only 6 segment registers: CS SS DS ES FS GS. Note that the same descriptor can be loaded in more than one register.

Also, the same memory region can be mapped by multiple segments but with different attributes. In particular, it is virtually a requirement that the SS (stack) area be read/write. If it uses the same address space as DS and you want DS to be readonly, DS differs from SS as least from a RW/RO perspective.

Likewise, it is very common for DS and ES to be mapped to the same space for convenience using the MOVS/CMPS/SCAS/LODS instructions.

wallyk
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