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I have a simple makefile which finds the CPP files relative to it and builds the target from there. How could I modify this to also precompile the header files relative to it when building the target?

TARGET ?= application
CXXFLAGS += -Os -I. -MMD -MP -std=c++11    

SOURCES := $(shell find -L . -name '*.cpp')
OBJECTS := $(SOURCES:.cpp=.o)
DEPENDS := $(SOURCES:.cpp=.d)    

$(TARGET): $(OBJECTS) 
    $(CXX) $(OBJECTS) -o $@ $(LDLIBS)    

.PHONY: clean    

clean : 
    $(RM) $(TARGET) $(OBJECTS) $(DEPENDS)    

-include $(DEPENDS)
Josh Olson
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    "precompile the header files" - I know MSVC's precompiled headers better than GCC's, but typically you only precompile one: you set up a header that contains or includes the majority of your dependencies and then you precompile that, and that must be the first #include in any sources that use it. So you'd normally know what that is ahead of time. Or I suppose you could grep your C++ files for the first PCH-like #include statement, build a list of those and then precompile all of those? But I expect you'd know what those should be ahead of time. – Rup May 21 '18 at 23:41
  • @Rup, Admittedly make isn't my strong suit, but the documentation is a bit foreign to me as well. Thanks for mentioning this, I didn't realize that's typically how it's done. – Josh Olson May 21 '18 at 23:42

1 Answers1

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Looks like I'm not able to do what I had in mind. The solution here is to follow @Rup's advice and include the major dependencies in a single compiled header.

GCC - 3.21 Using Precompiled Headers

A precompiled header file can be used only when these conditions apply:

  • Only one precompiled header can be used in a particular compilation.
Josh Olson
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