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He gave these questions a. 13 is obviously the largest piece of data in the sample set. After 13 was stored in D0, what was the state of the CCR when another number was compared against it (just give the 5 bits and indicate which bits were triggered). b. What was the state of the CCR after the final piece of data (0) was moved into the D1 register.

*    

ORG $400  
MOVEA.L #DATA,A0  
CLR.B   D0  
NEXT    MOVE.B (A0),D1  
BEQ EXIT  
CMP.B   D0,D1  
BLE EndTest  
MOVE.B  D1,D0  
EndTest ADDA.L  #1,A0  
BRA NEXT    
EXIT    STOP    #$2700  
*         
ORG $1000  
Data    DC.B    12,13,5,6,4,8,4,10,0      
END $400

I compiled it, but I don't see 5 bits in easy68k. I know ccr is made of flag bits but i'm not sure what to do.

Cœur
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user620756
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1 Answers1

1

This loop is equivalent to the following C code:

char *byte = data;
char cur, max = 0;

while ((cur = *byte++))
    if (cur > max) max = cur;

I.e. the loop will always iterate over all values and terminate when it finds the zero at the end. That means by the time you hit EXIT, you've gone through the BEQ EXIT check that tested the result of the previous load and found it to be zero. The CCR will be 0x??04, i.e. only the Z, zero flag set, as that's what BEQ checks for.

As far as the BLE test goes, this is a complex check on the flags; According to Motorola's 68k reference manual, table 3.19, it tests for Z || (N && !V) || (!N && V), i.e. for mutual exclusivity of N / V or zero (that'd be the equal part), so several combinations of the flags may result in that branch being taken. For your specific data, I would assume that, given the previous value was 12, you'll end up with N set, i.e. a CCR value of 0x??08 (CMP on most CPUs does a subtract-with-discard, and 12-13 is negative).

Regarding m68k assembly, this wikibook is a good intro. It describes conditional branches / CCR flag tests but leaves out the tricky bits above ...

FrankH.
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