The difference between x and z

Question

While reading the syntax of Verilog, I came across the four logic values: 0 1 x z. After searching the web, seeking to find the difference between x and z, I found only that x is unknown value and z is high impedance (tristate). I think that I understand the definition of x but didn't quite understood the one of z - what does it mean "high impedance (tristate)"?

I would like to see an example for each logic value out of the two: x z

score 13 · Answer 1 · edited May 22 '21 at 03:59

13

Z means the signal is in a high-impedance state also called tri-state. Another signal connected to it can change the value: a 0 will pull it low, a 1 will pull it high.

To understand impedance (and thus high impedance) you should have some understanding of resistance, voltage and current and their relations as defined by Ohms law.

I can't give you an example of 'X' or 'Z', just as I can't give you an example of '1' or '0'. These are just definitions of signal states. In fact in Verilog there are more then four states. There are seven strengths. (See this webpage).

Here is a principle diagram of how a chip output port makes a zero, one or Z. In reality the switches are MOSFETs.

Tri-state signals are no longer used inside chips or inside FPGA's. They are only used outside for connecting signals together.

edited May 22 '21 at 03:59

Sean Wei

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answered Apr 23 '18 at 18:45

Oldfart

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your last comment about tri-state not being used "on chips" seems a bit off... for example what if you have an SoC with package-on-package, or a multi-chip module where you've got a CPU and some DDR RAM? Even in a non-SoC regime, the memory controller in the CPU will still need to internally support tri-state to conform with the JEDEC spec. – nmz787 Sep 14 '18 at 16:37
That is a matter of nomenclature. I would not call two die in a package like in a POP a 'chip'. In fact the term "multi-chip module" says it all: it is multiple chips. – Oldfart Sep 14 '18 at 17:42
Sorry, I know this is old. A huge number of CPUs out there have multiple cores on the same die. I worked on a CPU where we had dozens (over a hundred) of cores all connected together on a bus/ring...again, all on the same die (or chip or whatever you want to call it...it was the same silicon). The bus connections used Tri-state. I suspect my chip wasn't unique with this, and tri-state is a lot more common than you think. – mdiehl13 Nov 04 '19 at 23:20
@oldfart what about floating gate flash, or charge-trap flash. Aren't those tri-state sort of situations? – nmz787 Nov 30 '21 at 23:20

score 4 · Answer 2 · answered Apr 23 '18 at 19:45

x, as you had already found describes an unknown state. By default verilog simulation starts with all variables initialized to this value. One of the task of the designer is to provide correct reset sequences to bring the model into a known state, without 'x', i.e.

 always @(posedge clk)
    if (rst)
        q <= 0;

In the above example initial value of q which was x is replaced by a known value of 0.

The difference between 'x' and 'z' is that 'z' is a known state of high impedance, meaning actually disconnected. As such, it could be driven to any other value with some other driver. It is used to express tri-state buses or some other logic.

 wire bus;
 assign bus = en1 ? value1 : 1'bz;
 ...
 assign bus = en2 ? value2 : 1'bz;

In the above example the bus is driven by 2 different drivers. If 'en1' or 'en2' is high, the bus is driven with a real 'value1' or 'value2'. Otherwise its state is 'z'.

verilog has truth tables for every operator for all the values. You can check how they are used. i.e. for '&'

&  0 1 x z

0  0 0 0 0
1  0 1 x x
x  0 x x x
z  0 x x x

you can find for every other gate as well. Note that there are no 'z' in the result, just 'x's.

thanks, needed to figure out how to store `0xZ` and `0xX` to numeric/digital data types! — nmz787, Sep 14 '18 at 16:26

score 2 · Answer 3 · answered Jan 23 '20 at 16:23

In system verilog X is treated like unconnected wire and Z is Weak HIGH.

Suppose a situation where you have wire connecting 2 modules m1 and m2. If you are driving Z onto that wire from m1 then you can pull down this wire by assigning it to zero by m2.

score 0 · Answer 4 · answered Feb 25 '21 at 08:06

As I figured out : "tristate" or "high impedance" In transistors occures when you have "nothing" in the output. that may occur, for example : In a situation that you have an nMOS transistor let's call that T1:

the gate value of T1 is for example 0 so T1 would not conduct and there is no conduction path between your supply (probably 0 ) and the drain(output) -that may occur a "Z" or tristate -- It may occur for PMOS transistors with value -> 1 too.

The difference between x and z

4 Answers4