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We wrote a school project with entity symbol that outputs 1 or 0 and are supposed to write testbench on our own with assert. We were told that it can be in a loop or not, but it has to be throught assert. I'm quite new to VHDL, so it is a little difficult for me to write the test bench properly. ADDRESS is value from 0 to 15, ROW and COLUMN are values from 0 to 7 and I should check one symbol completely (all rows and columns) and then random values in other addresses as well. 

ENTITY symbol IS
END symbol_tb;

ARCHITECTURE behavior OF symbol_tb IS 

COMPONENT symbol
PORT(
     ADDRESS : IN  std_logic_vector(3 downto 0);
     COLUMN : IN  std_logic_vector(2 downto 0);
     ROW : IN  std_logic_vector(2 downto 0);
     DATA : OUT  std_logic
    );
END COMPONENT;

signal DATA : std_logic 
signal ADDRESS : std_logic_vector(3 downto 0) := "0011";
signal COLUMN : std_logic_vector(2 downto 0) := "011";
signal ROW: std_logic_vector(2 downto 0) := "001";

BEGIN

-- Instantiate the Unit Under Test (UUT)
uut: symbol PORT MAP (
      ADDRESS => ADDRESS,
      COLUMN => COLUMN,
      ROW => ROW,
      DATA => DATA
    );

-- Stimulus process
stim_proc: process
begin       
wait for 5 ns;
end process;

END;

My question is, how to put assert in a loop? I would be grateful for any advice regarding testbenches in VHDL.

Saeko
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  • many examples on SO and the web. Just look [here in the TB code](https://stackoverflow.com/a/49551546/6717178) – JHBonarius Mar 30 '18 at 17:55
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    *My question is, how to put assert in a loop?* What loop? *I'm quite new to VHDL, so it is a little difficult for me to write the test bench properly* is a bit vague as a problem statement considering there is no loop in evidence in your code. Can you ask a specific question? –  Mar 30 '18 at 22:13
  • Traversing ROW and COLUMN for one symbol before proceeding to the rest of the symbols sounds like three nested loops (with the innermost having a `wait for ...`). What are you going to compare the symbol to for validation? –  Mar 30 '18 at 22:16
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    Basically, write a loop (in a process of course) and write an assert inside it. But that can't be what you're looking for, so we can't understand the underlying question. –  Mar 31 '18 at 09:20

0 Answers0