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This is a question I've been trying to get an answer for some time. Is there any limit to the number of RFNoC blocks that can be added to a x310 USRP?

Marcus Müller
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Felipe Augusto de Figueiredo
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To cite the source code you'd need to be modifying to add your own blocks:

https://github.com/EttusResearch/fpga/blob/maint/usrp3/top/x300/rfnoc_ce_auto_inst_x310.v#L1:

localparam NUM_CE = 10; // Must be no more than 10 (6 ports taken by transport and IO connected CEs)

You can't have more than ten blocks.

Marcus Müller
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  • Thanks for the answer. Now based on it, another question popped up, is the limitation of 10 blocks only due to RFNoC implementation or is it because the FPGA logic cells won't accommodate more than 10 blocks? Thanks again! – Felipe Augusto de Figueiredo Mar 16 '18 at 08:45
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    The limitation comes from the AXI crossbar, which has only 16 ports available for CE connections. As said in the code, 6 of this ports are already used by the necessary interfaces. To talk about FPGA utilization is rather relative, as it depends on the amount of processing each block performs. – primer_cuervo Mar 16 '18 at 12:23
  • I'm still a litlle bit confused, the verilog comment says that 6 ports are already taken, so I'm assuming you can only add 4 new blocks, however, you are saying that the crossbar has 16 ports and that 6 are already being used, which leaves us with 10 spare ports. Therefore, in the end, can we add 4 or 10 new blocks? Thanks! – Felipe Augusto de Figueiredo Mar 16 '18 at 21:56
  • My answer. Last sentence. – Marcus Müller Mar 16 '18 at 21:57