Consider this simple makefile:
all: output.txt
# The actual build command won't be this simple.
# It'll more be like "some-compiler file1.txt",
# which includes file2.txt automatically.
output.txt: file1.txt
cat file1.txt file2.txt > output.txt
file2.txt:
echo "heyo" > file2.txt
file1.txt: file2.txt
On first run, Make recognizes that file2.txt
is a dependency of file1.txt
, and so it needs to be built for output.txt
to be built. Thus, it runs echo "heyo" > file2.txt
and then cat file1.txt file2.txt > output.txt
.
However, on subsequent runs, if file2.txt
is changed, Make doesn't rebuild! If file1.txt
is changed it does, but not for file2.txt
. It just gives the dreaded make: Nothing to be done for 'all'.
message.
One hacky solution I've seen people suggest is to do the following:
all: output.txt
output.txt: file1.txt file2.txt
cat file1.txt file2.txt > output.txt
However, that's not possible in my case, as my secondary dependencies (the lines like file1.txt: file2.txt
) are dynamically generated using include
.
How do I make sure Make checks for modifications all the way up the tree when I have multiple levels of dependencies?