I have an array of decimal values like 0.0047, -45.34 etc. Is there a way I can add this in verilog and automatically view it's 16 bit converted value?
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Why did you tag this with SystemVerilog Assertions? You need to be more precise about what you mean by "add" and view in Verilog. – dave_59 Mar 04 '18 at 19:46
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You can use 'real' but you can not synthesize it. You have to find a binary representation for your numbers either floating point or fixed point. You have to define a range for your numbers and also a precision as binary representation of real number is often an approximation.
I did some calculations. You have a positive and negative number so you need a sign bit. Leaves 15 bits for the values. You want to have at least 45, that requires 6 bits. leaves 9 bits for the fraction. The closest you can get to 0.0047 is then 0.0046875. Your range is then -63.998 .... +63.998

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