1

I know how these modes work on other processors, what I don't understand is why doesn´t the 80386 need the post-increment and pre-decrement addressing modes?

Also what´s the relation between these addressing modes and the push and pop instructions?

Fifoernik
  • 9,779
  • 1
  • 21
  • 27
  • Do you have a question? If yes, please edit your post to include a question. – fuz Feb 28 '18 at 17:03
  • 3
    almost no processor **needs** these modes (at least if it does have indirect addressing and basic arithmetic over general purpose registers). Although they may be handy, but when I'm coding x86 asm, I don't really miss these, one gets used to write the code in other way quickly (but x86 has also `lods`, `stos`, `movs` instructions, etc... so it's not like it lacks post/pre increments completely). – Ped7g Feb 28 '18 at 17:24
  • 2
    Most RISC machines don't have inc/dec addressing modes. ARM is the exception, being less RISCy than MIPS, SPARC, and so on. – Peter Cordes Feb 28 '18 at 19:46
  • Also note that post increment and pre decrement get decoded into the same micro-ops as two separate instructions, so almost no impact on execution speed. – Tim Dec 11 '21 at 09:47

1 Answers1

7

why the 80386 doesn´t need the post-increment and pre-decrement addressing modes?

You never really need post-increment and pre-decrement addressing modes as long as you have ADD/SUB instructions. They're just convenience instructions.

what´s the relation between this addressing modes and the push and pop instructions?

PUSH is pre-decrement save and POP is post-increment load.

m0skit0
  • 25,268
  • 11
  • 79
  • 127
  • 2
    ARM pre/post-increment (with an explicit offset, so it can be negative for pre/post-decrement) is supported directly in the machine code, *not* as a pseudo-instruction (multiple machine instructions from one asm source line). ftp://www.cs.uregina.ca/pub/class/301/ARM-addressing/lecture.html. Apparently `VLDR` with post-increment is a pseudo-instruction for `vldm` (vector load multiple), though. http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204j/CJADEFGH.html – Peter Cordes Feb 28 '18 at 19:55