First, there's no such thing as "a program that is not using linkage stacks", otherwise your PR instruction would cause an exception (abend).
Also, from the IBM Principles of Operation:
If the backward stack-entry validity bit, bit 63, of the current entry
is zero, a stack-empty exception is recognized, and the operation is
nullified;
This suggests that not only is there a linkage stack, but there is at least one frame on it, otherwise your PR instruction would fail with the stack-empty condition.
The "standard" way of terminating a program without using standard linkage and returning to that R14 address you were passed would be to issue an SVC 3 instruction (SVC 3 is "EXIT"...terminate the current RB). Indeed, if you look closely, you'll see that the R14 return address that you're passed at entry to a job step program is simply pointing to CVTEXIT, an SVC 3 instruction, so this is exactly what you're doing when you do BR 14 (or whatever) at the end of your program - no reason you can't issue the SVC 3 yourself.
Piecing this together, it sounds like when z/OS attaches your program, it passes you a linkage stack with a frame having a PSW pointing to an SVC 3 instruction. When you issue PR before anything else changes the stack, you're indirectly taking a long branch to this SVC 3 instruction and your program ends.
You can validate this yourself - take a dump at entry to your program, and look at the formatted linkage stack. If you don't know how to do this, just create a one line assembler program with DC F'0' at the entry point and run it in batch with a //SYSMDUMP DD statement allocated (SYSMDUMP = machine readable dump). Then you can use IPCS to view the dump interactively and figure all this stuff out (and that's a valuable skill to have in its own right!).